32-bit MCU for Automotive Powertrain Applications

MPC5553 Not Recommended for New Designs

The NXP MPC5553 embedded controller provides an ideal solution for mid-range engine management applications and industrial uses cases requiring complex, real-time control.

  • Includes on-chip fast Ethernet controller (FEC)
  • Delivers system performance of up to five times that of its MPC500 predecessors
  • Supports multiple protocols and customer requirements through intelligent subsystems
  • Integrates more functionality on-chip for greater cost effectiveness
  • Offers a migration path from the market-leading MPC500 family MCUs, facilitating reuse of legacy software architectures
  • Simplifies and speeds designs through comprehensive development tools

Block Diagram

MPC5553

MPC5553 Block Diagram
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Features

Our e200z6 Core

  • High-performance 132 MHz 32-bit Power Architecture core
  • Memory management unit (MMU) with 32-entry fully associative translation lookaside buffer (TLB)
  • SPE (signal processing extension): DSP, SIMD and floating point capabilities

Memory

  • 1.5 MB of embedded flash memory with error correction coding (ECC) and read while write capability (RWW)
  • 64 KB on-chip static RAM with ECC
  • 8 KB of cache (with line-locking) that can be configured as additional RAM

System

  • An enhanced time processor unit (eTPUs) with 32 I/O channels and 14.5 KB of dedicated SRAM
  • 32-channel eDMA (enhanced direct memory access) controller
  • Interrupt controller (INTC) capable of handling 210 selectable-priority interrupt sources
  • Frequency modulated phase-locked loop (FMPLL) to assist in electromagnetic interference (EMI) management
  • MPC500 compatible external bus interface
  • Nexus IEEE®-ISTO 5001 class 3+ multicore debug capabilities > 5/3.3V IO, 5V ADC, 3.3V/1.8V bus, 1.5V core
  • Fast Ethernet connection(FEC)
  • 416-pin PBGA, 324-pin PBGA, or 208 MAPBGA package
  • Temperature range: -40 to 125ºC

I/O

  • 40-channel dual enhanced queued analog-to-digital converter (eQADC)—up to 12 bit resolution and up to 1.25us conversions, six queues with triggering and DMA support
  • Three deserial serial peripheral interface (DSPI) modules—16-bits wide up to six chip selects each
  • Two controller area network (CAN) modules with 64 buffers each
  • Two enhanced serial communication interface (eSCI) modules
  • 24-channel enhanced multiple I/O system (EMIOS) with unified channels

Development Tools

  • A comprehensive suite of hardware and software development tools is available to help simplify and speed system design
  • Development support is available from leading tools vendors providing compilers, debuggers and simulation development environments

Buy/Parametrics

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Documentation

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Compact List

Application Note (64)
Application Note Software (7)
Data Sheet (1)
Errata (2)
Fact Sheet (3)
Product Brief (1)
Product Change Notice (1)
Reference Manual (9)
Supporting Information (1)
Technical Notes (6)
User Guide (3)

Design Files

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Hardware

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Software

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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

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Training

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4 trainings