QorIQ® P1010

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P1010 and P1014 devices are "Not recommended for new designs", please use the replacement families Power Architecture (T1013, T1023), Arm Architecture (LS1012A, LS1023A).

The QorIQ^® P1010 and P1014 communications processors expand QorIQ performance into cost- and power-sensitive applications. Based on 45 nm technology, the processors provide performance up to 1000 MHz and power dissipation as low as 1.1 watts, along with extensive integration and a rich set of interfaces that target cost-sensitive endpoint applications such as:

IP Camera
Industrial Robot
Wireless LAN (WLAN) Access Point
Network Attached Storage
Printing and Imaging
Router

Data Sheet

Reference Manual

Product Details

Block Diagram

P1010 BD IMG

Get diagram PDF

Features

Core Complex

Single e500 core, built on Power Architecture^{^®} technology
32 KB of L1 instruction cache and 32 KB of L1 data cache
400 to 1000 MHz core clock frequency
256 KB L2 cache with ECC, also configurable as SRAM and stashing memory

Networking Elements

SerDes
- 6 lanes at up to 3.125 GHz
- Supports SGMII, PCI Express^{^®} (PCIe) and SATA

Accelerators and Memory Control

16-/32-bit DDR3 SDRAM memory controller with ECC support
Hardware-based cryptography acceleration (SEC4.0)
Up to three Gigabit Ethernet interfaces with support for IEEE^{^®} 1588
- TCP/IP acceleration, quality of service and classification capabilities
- Support for RGMII and SGMII

Basic Peripherals and Interconnect

1 x USB controller (USB 2.0) with integrated PHY, OTG and device support
2x Serial ATA (SATA2.0) controllers
Serial peripheral interface (SPI)
Trusted boot platform, integrated security
Four-channel DMA controller
2 x I²C controllers, 2 x DUARTs, timers
Integrated flash controller (IFC) with enhanced capabilities to support large pages
2x PCIe controllers
2x FlexCAN interfaces to support industrial protocols

Additional Features

Trusted boot platform

Comparison Table

	P1010	P1014
Core Frequency	533 to 1000 MHz	400 to 800 MHz
L2 Cache	256 KB	256 KB
DDR3	16/32-bit @ 800 MHz	16-bit @ 800 MHz
GE Ports	3	2
SATA	2	2
PCI Express	2	2
Security	Trusted	No
CAN	2	No

Buy/Parametrics

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Design Resources

Design Files

Quick reference to our design files types.

2 design files

Receive the full breakdown. See the product footprint and more in the eCad file.

Models
P1010 IBIS Model

ZIPRev 1Mar 26, 2014 00:00:00946.3 KBP1010IBIS
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Models
P1010 BSDL Model

ZIPRev 2Jun 1, 2015 00:00:008.5 KBP1010BSDL
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Software

Quick reference to our software types.

3 software files

Development IDEs and Build Tools
CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVALFeatured

FLEXERARev 10.5.xNov 26, 2019 11:05:001 KBCWX-PA-PRO-EX

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Configuration Tools
Processor Expert^® Software – Component Development Environment v1.0.4

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Development IDEs and Build Tools
CodeWarrior^® Development Suites for Networked Applications

Download Options

Note: For better experience, software downloads are recommended on desktop.

Training

1 trainings

On-Demand
Security 101: Introduction to Security Acceleration in QorIQ Processors

4 minEnglish

Account Required

QorIQ® P1010 and P1014 Low-Power Communications Processors with Trust Architecture

Product Details

Block Diagram

P1010 BD IMG

Features

Core Complex

Networking Elements

Accelerators and Memory Control

Basic Peripherals and Interconnect

Additional Features

Comparison Table

Applications

Automotive

Industrial

Buy/Parametrics

Documentation

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Application Note (26)

AN5079, QorIQ P1 Series to T1 Series Migration Guide - Application Note[AN5079]

AN4938, Differences Between P1010 and P1014, Rev 1.0 and 2.01 - Application Notes[AN4938]

AN5125, Introduction to Device Trees - Application Note[AN5125]

AN4039, PowerQUICC and QorIQ DDR3 SDRAM Controller Register Setting Considerations - Application Note[AN4039]

AN4534, P1010 QorIQ Integrated Processor Design Checklist - Application Notes[AN4534]

AN4848, Simple Program to Confirm PCIe Connectivity - Application Notes[AN4848]

AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes[AN4531]

AN3940, Hardware and Layout Design Considerations for DDR3 SDRAM Memory Interfaces - App Note[AN3940]

QorIQ eSPI Controller Register Setting Considerations and Programming Examples[AN4375]

Booting from On-Chip ROM (eSDHC or eSPI)[AN3659]

Enabling SD Interface on P1010 Reference Design Board[AN4336]

Verification of the IEEE 1588 Interface[AN4326]

SerDes Reference Clock Interfacing and HSSI Measurements Recommendations[AN4311]

Support for IEEE 1588™ Protocol in PowerQUICC and QorIQ Processors[AN3423]

DDR Interleaving for PowerQUICC and QorIQ Processors[AN3939]

Understanding SYSCLK Jitter[AN4056]

The SystemID Format for Power Architecture™ Development Systems[AN3638]

MPC603e and e500 Register Model Comparison[AN2490]

Implementing SGMII Interfaces on the PowerQUICC™ III[AN3869]

PowerQUICC™ Data Cache Coherency[AN3544]

Coherency and Synchronization Requirements for PowerQUICC™ III[AN3441]

Error Correction and Error Handling on PowerQUICC (TM) III Processors[AN3532]

AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes[AN3445]

AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes[AN3531]

Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces[AN2910]

AN2665, e500 Software Optimization Guide (eSOG) - Application Notes[AN2665]

Application Note Software (2)

Enabling SD Interface on P1010 Reference Design Board[AN4336SW]

Challenges in Testing for Power Rail Shorts with New Technologies[AN3372]

Brochure (2)

Trust Architecture: Freescale’s Security Solution for Industrial Control Systems (ICS)[PWRARBYNDBITSTA]

P1010 and P1014 low-power communications processors - Brochures[P1010APPBRF]Featured

Data Sheet (2)

P1014 QorIQ Integrated Processor Hardware Specifications - Data Sheet[P1014EC]

P1010 QorIQ Integrated Processor Hardware Specifications - Data Sheet[P1010EC]

Fact Sheet (2)

QorIQ P1010 and P1014 Communications Processors[QP1010FS]Featured

QorIQ P1010 RDB - Fact Sheet[P1010RDBFS]Featured

Reference Manual (5)

P1010 QorIQ Integrated Processor Reference Manual[P1010RM]

P1014 QorIQ Integrated Processor Reference Manual[P1014RM]

P1010 Security (SEC 4.4) Reference Manual[P1010SECRM]

EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual[EREF_RM]

PowerPC ™ e500 Core Family - Reference Manual[E500CORERM]

Supporting Information (3)

FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP® Cryptographic Accelerators - White Paper[FSLNISTCAVP]

Migrating from PowerQUICC® II Pro to QorIQ®’s P1010[P1010_MGRTN_DCM]

P1010_1014 Family Customer Export Control Information[P1010_1014PECI]

Technical Notes (1)

COM Express Pin Assignments for QorIQ Devices[EB739]

User Guide (1)

Spectre and Meltdown Updates for Power ISA Cores[SPECTRE-MELTDOWN-POWER-ISA-DOC]

White Paper (5)

Speculative Execution Vulnerabilities and Mitigations on NXP PowerPC Processors White Paper[SPECTREPPCWP]

QORIQPMWP, QorIQ Power Management - White Paper[QORIQPMWP]

Secure Boot - White Paper[QORIQSECBOOTWP]

Integrated Flash Controller[INTFCWP]

An Introduction to the QorIQ Platform's Trust Architecture[QORIQTAWP]

QorIQ P1010 and P1014 Communications ProcessorsFeatured

QorIQ P1010 RDB - Fact SheetFeatured

P1010 and P1014 low-power communications processors - BrochuresFeatured

Design Resources

QorIQ^® P1010 and P1014 Low-Power Communications Processors with Trust Architecture

FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP^® Cryptographic Accelerators - White Paper[FSLNISTCAVP]

Migrating from PowerQUICC^® II Pro to QorIQ^®’s P1010[P1010_MGRTN_DCM]