The LPC4350FET180 is an Arm® Cortex®-M4 based digital signal controller with an Arm Cortex-M0 coprocessor designed for embedded applications requiring signal processing. The Arm Cortex-M4 core offers single-cycle Multiply-Accumulate and SIMD instructions and a hardware floating-point unit to support signal processing while the M0 coprocessor handles I/O and digital control processing. The LPC4350FET180 includes 264 kB of data memory, two High Speed USB 2.0 Host/OTG/Devices, advanced configurable peripherals such as the State Configurable Timer (SCT), Serial General Purpose I/O (SGPIO), and SPI Flash Interface (SPIFI) as well as Ethernet, LCD, an external memory controller and multiple digital and analog peripherals.
|
|
|
|
|
|
|
|---|---|---|---|---|---|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Quick reference to our documentation types.
1-10 of 29 documents
Compact List
1-5of 6 design files
Receive the full breakdown. See the product footprint and more in the eCad file.
4 hardware offerings
Additional hardware available. View our featured partner solutions.
Quick reference to our software types.
5 software files
Additional software available. View our featured partner solutions.
Note: For better experience, software downloads are recommended on desktop.
To get further assistance directly from NXP, please see our Engineering Services.
5 engineering services
To find additional partner offerings that support this product, visit our Partner Marketplace.
1-5 of 10 trainings
