MCX A13x, 14x, 15x MCUs with Arm® Cortex® M33, Scalable Device Options, Low Power and Intelligent Peripherals

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Block Diagram

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MCX A132/3, A142/3, A152/3 Block Diagram

MCX A142x Block Diagram

MCX A144/5/6, A154/5/6 Block Diagram

MCX A144x Block Diagram

Features

Key Features

  • Arm® Cortex®-M33 96MHz with 396 CoreMark (4.12 CoreMark/MHz)
  • Up to 1MB Flash, up to 128KB SRAM, 8 kB SRAM with ECC
  • All RAM can be retained down to Deep Power-down mode
  • -40 °C to 125 °C temperature range

Core Platform

  • Arm 32-bit Cortex-M33 CPU, with FPU and DSP extension instruction set, no TrustZone, no MPU

Memory

  • Single-bank Flash: Up to 1024 kB Flash with ECC (supports one bit correction and two-bits detection)
  • Flash minimum programming size is 16 bytes
  • Support Flash Swap with 8 kB granularity
  • Cache Engine with 4 kB RAM
  • Up to 128 kB RAM, configurable for up to 8 kB with ECC (support single bit correction, two-bits detection)
  • All RAM can be retained down to deep Power-down mode

Peripherals

  • Analog
    • Up to two single-ended 16-bit ADC with sample rate of 4.0 Msamples/sec in 12-bit mode, and 3.2Msamples/sec in 16-bit mode. Up to 32 ADC input channels with multiple internal and external trigger inputs
    • One integrated temperature sensor per ADC
    • One 12-bit DAC
    • Two high-speed comparators with 8 input pins and an 8-bit DAC as internal reference, one comparator is functional down to deep Power-down mode, can be used as a wake-up source from low-power modes
    • One OpAmp supports PGA
  • Timers
    • Up to five 32-bit standard general-purpose asynchronous timers/counters, each timer supports up to four capture inputs and four compare outputs; specific timer events can be selected to generate DMA requests
    • Low power timer
    • Frequency measurement timer
    • Windowed watchdog Timer
    • Wake timer
    • Microtick timer (UTICK) that runs from the 1 MHz clock. This can wake up the device from reduced power modes up to deep sleep with Flash off, with extremely low power consumption
    • 42-bit free running OS timer as a continuous timebase for the system, available in any reduced power modes
  • Communication Interfaces
    • USB 2.0 full speed device controller with on-chip PHY supporting crystal-less operation in device mode
    • Up to two LPSPI modules, supporting up to 50MHz operation frequency in primary mode
    • Up to four LPI2C supporting Standard, Fast, Fast+ and Ultra Fast modes
    • Up to five LPUART provides asynchronous, serial communication capabilities
    • One I3C bus interface
    • One FlexIO programmable as a variety of serial and parallel interfaces, including, but not limited to display driver and camera interface (depending on part number)
    • One FlexCAN with FD (depending on part number)
  • Advanced Motor Control subsystem
    • Up to two FlexPWM each with 3 submodules, providing 12 complementary outputs of PWM (no Nanoedge module)
    • Up to two Quadrature Decoder (eQDC), provides interfacing capability to position/speed sensors used in industrial motor control applications
    • Up to two AOI (AND/OR/Invert) module support up to 4 output trigger

MCUXpresso Developer Experience

Security

  • Device Life-cycle management
  • Flash read/write/execute permission protect by MBC and lockable
  • 128-bit Universal unique identifier (UUID) per device in accordance to IETF’s RFC4122 version 5 specification
  • Code watchdog and glitch attack resistant keyed access (Glikey) support security monitoring

Packaging

  • HVQFN32 (5x5 mm), HVQFN48 (7x7 mm), LQFP48 (7x7 mm), LQFP64 (10x10 mm), LQFP100 (14x14 mm), LFBGA64 (5x5 mm), VFBGA112 (7x7 mm)

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Documentation

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Compact List

Application Note (19)
Application Note Software (4)
Data Sheet (2)
Errata (1)
Fact Sheet (1)
Reference Manual (2)
User Guide (1)
User Manual (1)
White Paper (1)

Design Files

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Hardware

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Software

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Note: For better experience, software downloads are recommended on desktop.

Training

3 trainings

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