Low-Power PowerQUICC® II Pro Processor with DDR2, eSDHC, 128-ch. HDLC/TDM, 10/100 Ethernet, USB, IEEE® 1588

Block Diagram

Freescale PowerQUIICC MPC8306 Communications Processor Block Diagram

NXP<sup>&#174;</sup> PowerQUIICC MPC8306 Communications Processor Block Diagram

Features

  • e300 core running up to 266 MHz
  • DDR2 @ 266 MHz
  • QUICC Engine® running up to 200 MHz
    • 2x HDLC/TDM
    • 3x 10/100 or 2x 10/100 w/IEEE 1588 v2 (MPC8306 only)
  • USB 2.0
  • eSDHC (boot from eSDHC support on MPC8306 only)
  • 4x CAN (MPC8306 only)
  • 4x UART
  • Local bus (boot from NOR/NAND Flash memory support)
  • 0.95W typical at 266 MHz e300 core/200 MHz QUICC Engine (maximum = 1.28W)
  • 369 pin 19 x 19 mm MAPBGA package
  • This product is included in NXP®.s product longevity program, with assured supply for a minimum of 10 years after launch
  • Buy/Parametrics










































































































    Documentation

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    Application Note (11)
    Data Sheet (2)
    Errata (2)
    Fact Sheet (1)
    Reference Manual (2)
    User Guide (1)
    White Paper (1)

    Design Files

    Hardware

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    4 hardware offerings

    Software

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    2 software files

    Note: For better experience, software downloads are recommended on desktop.

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    Training

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