S12XA Automotive and Industrial Microcontrollers (MCUs)

Block Diagram

S12XA Microcontroller Block Diagram

S12XA Microcontroller Block Diagram

Features

HCS12X Core

  • 16-bit HCS12X CPU
    • Upward compatible with HCS12 instruction set
    • Interrupt stacking and programmer's model identical to HCS12
    • Instruction queue
    • Enhanced indexed addressing
    • Enhanced instruction set
  • EBI (external bus interface)
  • MMC (module mapping control)
  • INT (interrupt controller)
  • DBG (debug module to monitor HCS12X CPU and XGATE bus activity)
  • BDM (background debug mode)

XGATE

  • Peripheral co-processor
  • Parallel processing module offloads the CPU by providing high-speed data processing transfer between peripheral modules, RAM and I/O ports
  • Data transfer between flash EEPROM, peripheral modules and I/O ports

PIT (periodic interrupt timer)

  • Four timers with independent time-out periods
  • Time-out periods selectable between 1 and 224 bus clock cycles

CRG

  • Low noise/low power Pierce oscillator
  • Phase-lock look (PLL)
  • COP watchdog
  • Real-time interrupt
  • Clock monitor
  • Fast wake-up from stop mode

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Documentation

Quick reference to our documentation types.

1-10 of 59 documents

Compact List

Application Note (31)
Application Note Software (12)
Data Sheet (1)
Errata (7)
Fact Sheet (3)
Product Change Notice (1)
Reference Manual (1)
Supporting Information (1)
Technical Notes (2)

Design Files

Hardware

Quick reference to our board types.

5 hardware offerings

Software

Quick reference to our software types.

5 software files

Note: For better experience, software downloads are recommended on desktop.

Engineering Services

4 engineering services

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