Ultra-Reliable MPC56xS MCU for Automotive and Industrial Instrument Clusters

Block Diagram

MPC564xS Block Diagram

MPC564xS Block Diagram

Features

  • Dual-issue, 32-bit Power Architecture Book E compliant CPU core complex (e200z4d) Memory management unit and 4 KB instruction cache
  • Variable length encoding (VLE) instruction set enables significant code size reduction over conventional Book E-compliant code
  • Up to 2 MB on-chip flash with flash controller
  • Separate 4 x 16 KB flash block for EEPROM emulation
  • Up to 64 KB on-chip SRAM with ECC
  • Up to 1 MB on-chip graphics SRAM (no ECC)
  • Two TFT displays up to WVGA resolution parallel data interface (PDI) for digital video input
  • Sound generation and playback using PCM or DDS sources with 4-channel mixer and PWM or I2S outputs
  • Stepper motor drivers with stepper stall detect for up to six gauges

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Documentation

Quick reference to our documentation types.

1-10 of 36 documents

Compact List

Application Note (20)
Application Note Software (1)
Data Sheet (1)
Errata (2)
Fact Sheet (1)
Product Brief (1)
Product Change Notice (1)
Reference Manual (2)
Technical Notes (6)
User Guide (1)

Design Files

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1 design file

Hardware

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1-5 of 6 hardware offerings

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Software

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1-5 of 6 software files

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Note: For better experience, software downloads are recommended on desktop.

Engineering Services

1-5 of 9 engineering services

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To find additional partner offerings that support this product, visit our Partner Marketplace.

Training

8 trainings

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