32-bit Microcontrollers

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Product Details

Block Diagram

MPC5200 Block Diagram

 MPC5200 Block Diagram

Features

  • MPC603e series Power Architecture™ processor core
  • 0-400 MHz operation at -40°C to +85°C temperature range
  • Double Precision Floating Point Unit (FPU)
  • Instruction and Data Memory Management Unit (MMU)
  • 16K Instruction and 16K Data Caches
  • BestComm Intelligent DMA I/O Controller
  • SDR and 133 MHz Double Data Rate (DDR) memory interface (266 MHz effective)
  • Local Plus interface for flash memory, etc.
  • 10/100 Ethernet MAC
  • Peripheral Control Interface (PCI) Version 2.2
  • ATA/IDE Interface
  • USB 1.1 Host (two each. USB 2.0 compatible)
  • Programmable Serial Controllers (six)
  • Serial Peripheral Interface (SPI)
  • I²C (two)
  • I²S (up to three)
  • CAN 2.0 A/B (two)
  • J1850 BDLC-D
  • GPIO (up to 56)
  • 8 Timers
  • 1.5V core, 3.3V external (and 2.5V for DDR memory)
  • 272 Pin Plastic Pin Ball Grid Array (PBGA) Package
  • AEC-Q100, QS9000/TS-16949 automotive grade available
  • Lead (Pb) and lead-free packages
  • This product is included in NXP’s product longevity program, with assured supply for a minimum of 15 years after launch

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Documentation

Quick reference to our documentation types.

1-10 of 25 documents

Compact List

Application Note (12)
Data Sheet (1)
Errata (1)
Fact Sheet (1)
Reference Manual (5)
Technical Notes (1)
Training Presentation (1)
User Guide (3)

Design Files

Software

Quick reference to our software types.

1-5 of 7 software files

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Note: For better experience, software downloads are recommended on desktop.

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