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Pwm_Cfg.h

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00001 
00017 #ifndef PORT_CFG_H
00018  #define PORT_CFG_H
00019  
00020  #include "typedefs.h"
00021  
00023 #ifndef ON
00024   #define ON   0x01
00025 #endif
00026 
00027 #ifndef OFF  
00028   #define OFF  0x00
00029 #endif  
00030 
00032  #define Z0_CORE  ON
00033  
00034  /*----------------------------- Defines ---------------------------*/
00036  #define PWM_ERROR_DETECT  ON
00037  
00038  /********************************** PORT CONFIGURATION SECTION ***************************/
00040  #define PORTB_PIN_0    ((uint8_t)16)
00041  #define PORTB_PIN_1    ((uint8_t)17)
00042  #define PORTB_PIN_2    ((uint8_t)18)
00043  #define PORTB_PIN_3    ((uint8_t)19)
00044  #define PORTB_PIN_4    ((uint8_t)20)
00045  #define PORTB_PIN_5    ((uint8_t)21)
00046  #define PORTB_PIN_6    ((uint8_t)22)
00047  #define PORTB_PIN_7    ((uint8_t)23)
00048   
00049  /********************************** END OF PORT CONFIGURATION SECTION ***************************/ 
00050  #define DUTY_CYCLE_100      (uint32_t) (303) 
00051  #define DUTY_CYCLE_150      (uint32_t) (202) 
00052 
00053  #define PWM_MAX_CHANNELS  sizeof(Pwm_ChannelConfig[0])
00054  
00056  #define SET_PERIOD_AT_150HZ   ((uint32_t)0x000000CA)
00057  #define SET_PERIOD_AT_100HZ   ((uint32_t)0x0000012F)
00058  
00060  #define DTY_AT_5P_WITH_100HZ    (uint32_t) (((uint32_t)5 *(uint32_t)DUTY_CYCLE_100)/((uint32_t)100))
00061  #define DTY_AT_20P_WITH_100HZ   (uint32_t) (((uint32_t)20*(uint32_t)DUTY_CYCLE_100)/((uint32_t)100))
00062  #define DTY_AT_50P_WITH_100HZ   (uint32_t) (((uint32_t)50*(uint32_t)DUTY_CYCLE_100)/((uint32_t)100))
00063  #define DTY_AT_65P_WITH_100HZ   (uint32_t) (((uint32_t)65*(uint32_t)DUTY_CYCLE_100)/((uint32_t)100))
00064  #define DTY_AT_70P_WITH_100HZ   (uint32_t) (((uint32_t)70*(uint32_t)DUTY_CYCLE_100)/((uint32_t)100))
00065  #define DTY_AT_90P_WITH_100HZ   (uint32_t) (((uint32_t)90*(uint32_t)DUTY_CYCLE_100)/((uint32_t)100))
00066  
00068  #define DTY_AT_5P_WITH_150HZ    (uint32_t) (((uint32_t)5*(uint32_t)DUTY_CYCLE_150)/((uint32_t)100))
00069  #define DTY_AT_20P_WITH_150HZ   (uint32_t) (((uint32_t)20*(uint32_t)DUTY_CYCLE_150)/((uint32_t)100))
00070  #define DTY_AT_50P_WITH_150HZ   (uint32_t) (((uint32_t)50*(uint32_t)DUTY_CYCLE_150)/((uint32_t)100))
00071  #define DTY_AT_65P_WITH_150HZ   (uint32_t) (((uint32_t)65*(uint32_t)DUTY_CYCLE_150)/((uint32_t)100))
00072  #define DTY_AT_70P_WITH_150HZ   (uint32_t) (((uint32_t)70*(uint32_t)DUTY_CYCLE_150)/((uint32_t)100))
00073  #define DTY_AT_90P_WITH_150HZ   (uint32_t) (((uint32_t)90*(uint32_t)DUTY_CYCLE_150)/((uint32_t)100))
00074  
00076  #define PWM_CHANNEL_0           ((uint8_t)0)
00077  #define PWM_CHANNEL_1           ((uint8_t)1)
00078  #define PWM_CHANNEL_2           ((uint8_t)2)
00079  #define PWM_CHANNEL_3           ((uint8_t)3)
00080  #define PWM_CHANNEL_4           ((uint8_t)4)
00081  #define PWM_CHANNEL_5           ((uint8_t)5)
00082  #define PWM_CHANNEL_6           ((uint8_t)6)
00083  #define PWM_CHANNEL_7           ((uint8_t)7)
00084  
00085 
00087  #define PWM_HIGH  1
00088  #define PWM_LOW   0
00089  
00090  /*----------------------------- Structures ------------------------*/
00091  
00093         typedef struct
00094         {
00095             uint8_t  u8Pwm_Channel_Id;        /* Pwm channel name              */
00096             uint8_t  u8Pwm_Port_Channel;      /* Assigned HW channel           */
00097             uint32_t u32Period;               /* Pwm Period Value              */
00098             uint32_t u32Duty;                 /* Pwm duty Cycle                */
00099             uint32_t u32Cntr;                 /* Duty Cycle Counter            */
00100         } Pwm_ChannelConfigType;
00101         
00102         
00103 extern Pwm_ChannelConfigType Pwm_ChannelConfig[]; 
00104  
00105 #endif